1. Field of the Invention
The present invention relates to comparators, sample-and-hold circuits, differential amplifiers, two-stage amplifiers, and analog-to-digital converters.
2. Description of the Related Art
A comparator that compares an input signal and a reference signal has been widely used in various electronic circuits.
As this comparator, a comparator 101 having the structure shown in FIG. 12 is known. In the comparator 101, an input signal Vin and a reference signal Vref are applied to the input end of a sampling capacitor 102 through a first switch 103 and a second switch 104. The output end of the sampling capacitor 102 connects to an inverter circuit 107 formed by connecting two transistors 105 and 106 between a power supply VCC and the ground GND, and a third switch 108 is provided between the input and output terminals of the inverter circuit 107 (See, for example, Japanese Unexamined Patent Application Publication No. 10-145195).
In the comparator 101, the voltage of the input signal Vin is applied to the input end of the sampling capacitor 102 and a threshold voltage of the inverter circuit 107 is applied to the output end of the sampling capacitor 102 in such a manner that the first and third switches 103 and 108 are initially set to be on and the second switch 104 is set to be off. After that, by setting the first and third switches 103 and 108 to be off and the second switch 104 to be on, the voltage of the reference signal Vref is applied to the input end of the sampling capacitor 102.
When the voltage of the input signal Vin is greater than the voltage of the reference signal Vref, a voltage at the output end of the sampling capacitor 102 is less than the threshold voltage of the inverter circuit 107, and the inverter circuit 107 outputs a high level (H-level) signal. Alternatively, when the voltage of the input signal Vin is less than the voltage of the reference signal Vref, the voltage at the output end of the sampling capacitor 102 is greater than the threshold voltage of the inverter circuit 107, and the inverter circuit 107 outputs a low level (H-level) signal.
In the comparator 101, a range of the input signal Vin in which the comparator 101 is operable cannot be widened because the inverter circuit 107 is connected to the output end of the sampling capacitor 102.
This is because, in the comparator 101, widening the range of the input signal Vin in which the comparator 101 is operable greatly increases power consumption of the comparator 101 and deteriorates characteristics of the comparator 101 since a cutoff frequency of the input signal Vin is determined by two transistors 105 and 106 which constitute the inverter circuit 107.
In other words, in the comparator 101, in order to improve frequency characteristics of the transistors 105 and 106, transconductances of the transistors 105 and 106 must be increased. For the purpose, a direct current supplied to the transistors 105 and 106 must be increased, and the power consumption accordingly increases.
Also, in the comparator 101, in order that a large direct current may flow in each transistor 105 or 106, the transistors 105 and 106 must be enlarged. The enlarged transistors 105 and 106 increase their parasitic capacitances, and characteristics of the comparator 101 accordingly deteriorate.
As described above, since, in the comparator 101, the inverter circuit 107 is connected to the output end of the sampling capacitor 102, an increase in power consumption and deterioration in characteristic occur due to widening of the range of the input signal Vin. As a result, a range of the input signal Vin in which the comparator 101 is operable cannot be widened.